A proposed strategy for testing and verification of complex chip [uses EM signatures]

Manufacturers are under pressure to reduce costs. The design reuse concept, which makes use of predesigned components, is an attempt to reduce the cost of the superchip or the so-called system-on-a-chip (SoC). However, the production of such a complex chip may enhance performance, speed, and reliability, but also incurs a cost burden. It has been anticipated that the cost of testing an SoC may exceed the cost of fabricating the chip, and hence new approaches are needed to deal with the ever-increasing cost of testing. The strategy proposed here is an attempt to reduce such cost by focusing the attention on adopting a virtual test and spreading the cost throughout the manufacturing process.