VLSI design and implementation of a fuzzy logic controller for engine idle speed

The paper develops a VLSI fuzzy logic processor in digital circuits for engine idle speed control, which becomes a required part of the electronic control unit in contemporary automobiles. This fuzzy logic controller has some features: fuzzy logic algorithm is based on the zero-order T-S model; only the active rules are processed; operation of defuzzification is simplified; the speed of inference is approximately 20 MFLIPS when the system clock is 25 MHz and the execution is completed in pipeline architecture.