DocumentCode :
3268794
Title :
Proceedings of the 38th Design Automation Conference (IEEE Cat. No.01CH37232)
fYear :
2001
fDate :
22-22 June 2001
Keywords :
VLSI; analogue integrated circuits; application specific integrated circuits; circuit optimisation; design for testability; digital integrated circuits; electronic design automation; formal verification; high level synthesis; integrated circuit design; integrated circuit interconnections; logic CAD; low-power electronics; DSP processors; EDA; IP protection; VLSI design; analog design; design automation; digital arithmetic circuits; domain specific design methodologies; embedded systems; floorplanning algorithms; functional validation; gate delay calculation; high-level synthesis; interconnect design optimisation; logic synthesis; low power design; memory optimization techniques; microprocessor design; onchip communication architectures; placement algorithms; power estimation techniques; scan-based testing; scheduling techniques; signal integrity; system-level configurability; systems-on-a-chip; timing verification; yield optimisation;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation Conference, 2001. Proceedings
Conference_Location :
Las Vegas, NV, USA
ISSN :
0738-100X
Print_ISBN :
1-58113-297-2
Type :
conf
DOI :
10.1109/DAC.2001.156097
Filename :
935466
Link To Document :
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