Hierarchical implementation and performance analysis of Verilog-AMS Model of BSIM3v3.3 transistor

In the past, VLSI circuits were classified as digital (with some analog behavior associated with individual components) or as analog. For digital circuits, analog effects were usually negligible, but as feature sizes continue to decrease, analog effects can no longer be ignored. In addition, the current trend to integrate digital, analog, mixed-signal and radio-frequency (RF) components into a single "system-on-a-chip" for applications such as communications and networking requires efficient circuit design tools incorporating both digital and analog effects. Here we explore the effectiveness of Verilog-AMS for describing analog behavior. We present a well-documented version of the BSIMv3.3 transistor in Verilog-AMS. We describe our hierarchical development process, we compare a set of benchmark circuits using this model against their HSPICE counterparts, and we calculate the growth in Verilog-AMS simulation time as a function of the number of transistors in a circuit. Our results indicate that error between the two models is low and increased time is reasonable and illustrate that Verilog-AMS can effectively describe analog and mixed signal behavior and support design of systems-on-a-chip.