A 200 MHz 9-tap analog equalizer for magnetic disk read channels in 0.6 /spl mu/m CMOS

This paper describes an analog discrete-time equalizer that uses switched-capacitor (SC) filtering capable of achieving speeds higher than can otherwise be attained using conventional opamp techniques. The approach employs parallelism and exclusive use of open-loop circuitry in the signal path. Conventional SC filters require technologies with high-quality capacitors to create accurate ratios. The approach eliminates high-quality capacitors in the signal path and is amenable to digital CMOS processes.