Design-specific supply and threshold voltage optimization in nanometer era

With the scaling of VLSI technology and increase in leakage power, energy efficiency emerges as a design principle. This paper presents a methodology for constrained based optimization of energy-delay and finding the optimal associated supply and threshold voltages. These constraints are maximum temperature, maximum delay, EDP, and leakage to dynamic power ratio. Moreover, three methods for the continuous nonlinear optimization are compared where the problem is linearized in order to reduce the execution time. The methodology is illustrated for optimization of the energy delay product (EDP) subject to the design constraints but it is also applicable to other design metrics such as power-delay product (PDP) and power energy product (PEP). The results have been verified in 90 nm technology using Cadence Spectre simulator.