Configurable computing solutions for automatic target recognition

Author

Villasenor, John ; Schoner, Brian ; Chia, Kang-Ngee ; Zapata, Charles ; Kim, Hea Joung ; Jones, Chris ; Lansing, Shane ; Mangione-Smith, Bill

Author_Institution

Dept. of Electr. Eng., California Univ., Los Angeles, CA, USA

fYear

1996

fDate

17-19 Apr 1996

Firstpage

70

Lastpage

79

Abstract

FPGAs can be used to build systems for automatic target recognition (ATR) that achieve an order of magnitude increase in performance over systems built using general purpose processors. This improvement is possible because the bit-level operations that comprise much of the ATR computational burden map extremely efficiently into FPGAs, and because the specificity of ATR target templates can be leveraged via fast reconfiguration. We describe here algorithms, design tools, and implementation strategies that are being used in a configurable computing system for ATR

Keywords

computer vision; field programmable gate arrays; object recognition; reconfigurable architectures; ATR target templates; FPGAs; automatic target recognition; bit-level operations; configurable computing solutions; design tools; implementation strategies; Field programmable gate arrays;

fLanguage

English

Publisher

ieee

Conference_Titel

FPGAs for Custom Computing Machines, 1996. Proceedings. IEEE Symposium on

Conference_Location

Napa Valley, CA

Print_ISBN

0-8186-7548-9

Type

conf

DOI

10.1109/FPGA.1996.564749

Filename

564749