• DocumentCode
    3270215
  • Title

    Delay and slew analysis of VLSI interconnects using difference model approach

  • Author

    Ravindra, J.V.R. ; Srinivas, M.B.

  • Author_Institution
    Int. Inst. of Inf. Technol. (IIIT), Hyderabad
  • fYear
    2007
  • fDate
    5-8 Aug. 2007
  • Firstpage
    1313
  • Lastpage
    1315
  • Abstract
    In high speed digital integrated circuits, inductive- coupling effects in interconnects can be significant and should be included for accurate delay-noise analysis. In this paper, an analytical framework to model delay and slew metrics in coupled RLC interconnects is presented. The proposed models are based on difference model approach which involves the dynamic part of system transfer function. The models are generic in nature and can be applied to symmetric driver-and-line configurations for aggressor and victim wires. The model is compared against SPICE simulations and is shown to capture delay and slew accurately. Over a large set of random test cases, the average error in delay and slew estimation is approximately 1.8% and 3.2% respectively. A key feature of the new model is that its derivation and form enables an insight into the inductively coupled noise-waveform. Due to its simplicity and physical nature, the proposed model can be applied to asymmetric transmission lines. The obtained results indicate that common (capacitive) noise-avoidance techniques can behave quite differently when capacitive and inductive coupling are considered together.
  • Keywords
    RLC circuits; VLSI; delays; integrated circuit interconnections; integrated circuit modelling; network analysis; SPICE simulations; VLSI interconnects; analytical framework; asymmetric transmission lines; capacitive noise-avoidance; coupled RLC interconnects; delay analysis; delay-noise analysis; difference model approach; high speed digital integrated circuits; inductive coupling; inductive-coupling effects; inductively coupled noise-waveform; slew analysis; symmetric driver-and-line configurations; system transfer function; Analytical models; Coupled mode analysis; Coupling circuits; Delay effects; Delay estimation; Digital integrated circuits; Integrated circuit interconnections; Transfer functions; Very large scale integration; Wires;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 2007. MWSCAS 2007. 50th Midwest Symposium on
  • Conference_Location
    Montreal, Que.
  • ISSN
    1548-3746
  • Print_ISBN
    978-1-4244-1175-7
  • Electronic_ISBN
    1548-3746
  • Type

    conf

  • DOI
    10.1109/MWSCAS.2007.4488792
  • Filename
    4488792