DocumentCode
3270309
Title
A low power CMOS CORDIC processor design for wireless telecommunication
Author
Kim, Young Bok ; Kim, Yong-Bin ; Doyle, James T.
Author_Institution
Northeastern Univ., Boston
fYear
2007
fDate
5-8 Aug. 2007
Firstpage
1336
Lastpage
1339
Abstract
A CORDIC processor for wire telecommunication is integrated in a 0.5 mum CMOS technology. The CORDIC (coordinate rotation digital computer) processor reduces the circuit complexity by performing a sequence of elementary rotations using shift and add operations without multiplications. Hard wired-logic eliminates the shifter and includes pre-calculated arctan angle values. The average power consumption is 76 mW with 50 MHz clock and 5 V power supply. The fabricated modulator consumes 24 mW at 61.44 MHz sampling rate and 5 V power supply.
Keywords
CMOS integrated circuits; circuit complexity; digital computers; integrated circuit design; low-power electronics; microprocessor chips; radiocommunication; telecommunication computing; circuit complexity; coordinate rotation digital computer processor design; frequency 50 MHz; frequency 61.44 MHz; hard wired-logic; low power CMOS; power 24 mW; power 76 mW; size 0.5 mum; voltage 5 V; wireless telecommunication; CMOS process; CMOS technology; Clocks; Complexity theory; Energy consumption; Integrated circuit technology; Power supplies; Process design; Telecommunication computing; Wire;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2007. MWSCAS 2007. 50th Midwest Symposium on
Conference_Location
Montreal, Que.
ISSN
1548-3746
Print_ISBN
978-1-4244-1175-7
Electronic_ISBN
1548-3746
Type
conf
DOI
10.1109/MWSCAS.2007.4488797
Filename
4488797
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