Dynamical cache partitioning based on cache missing ratio and process priority

This paper studies the fairness model in the sharing cache between the cores in a chip Multi-processor (CMP) architecture, and makes two contributions as follows: firstly, this paper discussed the performance of the multi-core system based on the priority and the missing ratio, in contrast with the relative researches focus on the process priority, thread missing ratio or the relation between the process priority and the throughput respectively in past. Secondly, this paper proposed the new metrics to measure the fairness of the sharing cache partitioning, and the algorithm is under the guideline of this theory of the fairness model to partition the cache in order to maximize the ability of the processing of the core and in the whole. The experiments proved that this algorithm is effective and it improves the CPU´s throughput.