Title :
On a web-graph-based micronetwork architecture for SoCs
Author :
Wang, Ling ; Piao, Shouye ; Jiang, Yingtao ; Jo, Juyeon ; Zhang, Lihong
Author_Institution :
Harbin Inst. of Technol., Harbin
Abstract :
From System-on-chip to Network-on-chip, the main dissimilarity is replacing the bus with the network. How connect, how formative network function is related to topology structure. In this paper we propose a topology structure for NoC, and compare it with mesh, torus, the fat tree, octagon , spidergon topology networks by five kinds of mainly properties : node degree, network diameter, connectivity, the average most short-circuit path and the average shortest wire length. Experiment results show that this topology has better performance on cost/performance layout.
Keywords :
computer architecture; graph theory; integrated circuit design; network topology; network-on-chip; SoC; Web-graph-based micronetwork architecture; formative network function; network-on-chip; short-circuit path; shortest wire length; system-on-chip; topology networks; topology structure; Computer architecture; Computer science; Delay effects; Integrated circuit interconnections; Network topology; Network-on-a-chip; Power system interconnection; Protocols; System-on-a-chip; Wiring;
Conference_Titel :
Circuits and Systems, 2007. MWSCAS 2007. 50th Midwest Symposium on
Conference_Location :
Montreal, Que.
Print_ISBN :
978-1-4244-1175-7
Electronic_ISBN :
1548-3746
DOI :
10.1109/MWSCAS.2007.4488808
