• DocumentCode
    3270617
  • Title

    FIFO flag timing: marching to two different drummers

  • Author

    Hastings, Chuck

  • Author_Institution
    Sharp Microelectron. Technol. Inc., Camas, WA, USA
  • fYear
    1993
  • fDate
    28-30 Sep 1993
  • Firstpage
    563
  • Lastpage
    570
  • Abstract
    A FIFO (First-in, First-Out memory device) can be thought of as a “passthrough window” between two independently-clocked digital subsystems-each marching to its own drummer, as it were. To adequately perform this role in practical digital systems, FIFOs are “schizoid”: they are memory devices, and they also are logic-synchronization circuits. Increasingly, newer FIFOs have been made capable of recognizing commands from the overall digital system of which they are part, and also of providing that system with timely status information in the form of “flag” values. This paper includes a short review of FIFO basics, followed by a more detailed discussion of flag-synchronization and metastability issues. Finally, the flag-synchronization features of the new Sharp LH540215/25 18-bit synchronous FIFOs are described, as a case in point
  • Keywords
    integrated memory circuits; synchronisation; timing circuits; 18 bit; FIFO flag timing; Sharp LH540215/25; digital systems; first-in first-out memory devices; flag synchronization; logic synchronization circuits; metastability; passthrough window; Circuits; Clocks; Digital systems; Hazards; Logic; Marketing management; Metastasis; Synchronization; Technology management; Timing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    WESCON/'93. Conference Record,
  • Conference_Location
    San Francisco, CA
  • ISSN
    1095-791X
  • Print_ISBN
    0-7803-9970-6
  • Type

    conf

  • DOI
    10.1109/WESCON.1993.488596
  • Filename
    488596