Title :
Reconstruction of Generalized Depth-3 Arithmetic Circuits with Bounded Top Fan-in
Author :
Karnin, Zohar S. ; Shpilka, Amir
Author_Institution :
Fac. of Comput. Sci., Technion - Israel Inst. of Technol., Haifa, Israel
Abstract :
In this paper we give reconstruction algorithms for depth-3 arithmetic circuits with k multiplication gates (also known as SigmaPiSigma(k) circuits), where k=O(1). Namely, we give an algorithm that when given a black box holding a SigmaPiSigma(k) circuit C over a field F as input, makes queries to the black box (possibly over a polynomial sized extension field of F) and outputs a circuit C´ computing the same polynomial as C. In particular we obtain the following results. (1) When C is a multilinear SigmaPiSigma(k) circuit (i.e. each of its multiplication gates computes a multilinear polynomial) then our algorithm runs in polynomial time (when k is a constant) and outputs a multilinear SigmaPiSigma(k) circuits computing the same polynomial. (2) In the general case, our algorithm runs in quasi-polynomial time and outputs a generalized depth-3 circuit with k multiplication gates. For example, the polynomials computed by generalized depth-3 circuits can be computed by quasi-polynomial sized depth-3 circuits. In fact, our algorithm works in the slightly more general case where the black box holds a generalized depth-3 circuits. Prior to this work there were reconstruction algorithms for several different models of bounded depth circuits: the well studied class of depth-2 arithmetic circuits (that compute sparse polynomials) and its close by model of depth-3 set-multilinear circuits. For the class of depth-3 circuits only the case of k = 2 (i.e. SigmaPiSigma(2) circuits) was known. Our proof technique combines ideas from previous works with some new ideas. Our most notable new ideas are: We prove the existence of a unique canonical representation of depth-3 circuits. This enables us to work with a specific representation in mind. Another technical contribution is an isolation lemma for depth-3 circuits that enables us to reconstruct a single multiplication gate of the circuit.
Keywords :
linear network analysis; polynomials; black box; bounded depth circuits; bounded top fan-in; depth-3 set-multilinear circuits; generalized depth-3 arithmetic circuits; isolation lemma; multiplication gates; unique canonical representation; Circuits; Computational complexity; Computer science; Digital arithmetic; Galois fields; Polynomials; Reconstruction algorithms; Reconstruction; arithmetic circuits; depth-3; multilinear;
Conference_Titel :
Computational Complexity, 2009. CCC '09. 24th Annual IEEE Conference on
Conference_Location :
Paris
Print_ISBN :
978-0-7695-3717-7
DOI :
10.1109/CCC.2009.18