Title :
Power-delay tradeoffs for radix-4 and radix-8 dividers
Author :
Nannarelli, Alberto ; Lang, Tomas
Author_Institution :
Dept. of Electr. & Comput. Eng., California Univ., Irvine, CA, USA
Abstract :
The use of higher radices in division reduces the number of iterations to complete the operation, but increases the complexity of the circuit. In this paper we explore the influence of the radix on the power dissipation of a floating-point divider and the power-delay tradeoffs. We compare the performance and the energy consumption per operation for a radix-4 and a radix-8 divider, realized in CMOS technology. A reduction of about 40% in the energy consumption is obtained for both radices (about 70% if low-voltage gates, for dual voltage implementation, are available). Also the results show that the radix-8 divider is about 20% faster and the energy dissipated to perform a division is about the same, with respect to the radix-4.
Keywords :
CMOS logic circuits; delays; dividing circuits; floating point arithmetic; integrated circuit design; iterative methods; CMOS technology; dual voltage implementation; energy consumption; floating-point divider; iterations; low-voltage gates; power dissipation; power-delay tradeoffs; radix-4 dividers; radix-8 dividers;
Conference_Titel :
Low Power Electronics and Design, 1998. Proceedings. 1998 International Symposium on
Conference_Location :
Monterey, CA, USA
Print_ISBN :
1-58113-059-7
