Trade-off analyses in system designs and some implications to manufacturing

Microprocessor speeds continue to double with every silicon generation. Consequently, the design and test margins continue to decrease very rapidly. With these decreasing margins, errors in the design and design validation phases of high-speed systems can cause direct yield hits at the desired frequency of operation. It is shown in this paper that estimating the system performance and carrying out the trade-off analyses based on the absolute worst case design/test are overly restrictive and can be misleading