Title :
40-Gb/s 1:2 Demultiplexer in 0.35-μm SiGe BiCMOS
Author :
Gui, Wang ; Zhi-Gong, Wang ; En, Zhu ; Jing-Feng, Ding
Author_Institution :
Inst. of RF-&OE-ICs, Southeast Univ., Nanjing
Abstract :
A 1:2 demultiplexer was designed in 0.35-mum SiGe BiCMOS technology. An improved latch was used to realize the core cell of this circuit. Compared to the emitter-coupled-logic (ECL), the emitter-emitter-coupled-logic (E2CL) used in this latch can increase its speed. The results show that this demultiplexer can operate at the data rate of 40-Gb/s. The whole circuit with single 5-V supply consumes 100 mA
Keywords :
BiCMOS integrated circuits; Ge-Si alloys; demultiplexing equipment; flip-flops; 0.35 micron; 0.35-mum SiGe BiCMOS technology; 100 mA; 40 Gbit/s; 5 V; SiGe; circuit core cell; demultiplexer; latch; BiCMOS integrated circuits; Clocks; Flip-flops; Germanium silicon alloys; Latches; Multimedia communication; Silicon germanium; Switches; Timing; Voltage;
Conference_Titel :
Communications, Circuits and Systems Proceedings, 2006 International Conference on
Conference_Location :
Guilin
Print_ISBN :
0-7803-9584-0
Electronic_ISBN :
0-7803-9585-9
DOI :
10.1109/ICCCAS.2006.285127
