DocumentCode
3272978
Title
Power distribution fidelity of wirebond compared to flip chip devices in grid array packages
Author
Hashemi, Hossein ; Herrell, D.
Author_Institution
Adv. Micro Devices Inc., Austin, TX
fYear
1996
fDate
28-30 Oct 1996
Firstpage
24
Lastpage
26
Abstract
We have simulated the power fidelity of wirebond and flip chip grid array packages suitable for next generation microprocessors. The DC power droop across the chip from resistive losses and the AC power noise from switching events were studied as a function of the number of package power planes, dielectric constant, the number of chip connections, decoupling capacitors and their location
Keywords
flip-chip devices; integrated circuit packaging; integrated circuit reliability; lead bonding; microprocessor chips; plastic packaging; AC power noise; DC power droop; chip connections; decoupling capacitors; dielectric constant; flip chip devices; grid array packages; next generation microprocessors; package power planes; power distribution fidelity; resistive losses; wirebond;
fLanguage
English
Publisher
ieee
Conference_Titel
Electrical Performance of Electronic Packaging, 1996., IEEE 5th Topical Meeting
Conference_Location
Napa, CA
Print_ISBN
0-7803-3514-7
Type
conf
DOI
10.1109/EPEP.1996.564765
Filename
564765
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