DocumentCode
3273185
Title
Impact of local interconnects on ESD design
Author
Scholz, Mirko ; Shih-Hung Chen ; Hellings, Geert ; Linten, Dimitri ; Boschke, Roman
Author_Institution
Logic Technol., Device Reliability Group, imec, Heverlee, Belgium
fYear
2015
fDate
1-3 June 2015
Firstpage
1
Lastpage
4
Abstract
Local interconnect (LI) as a contact scheme impacts significant the behavior of protection devices under Electro Static Discharge (ESD) stress. The narrow LI reduces the ESD robustness. At the same time, the on-resistance increases. This makes ESD protection design in future technology nodes more challenging, as the ESD design windows continuously shrinks.
Keywords
electrostatic discharge; integrated circuit design; integrated circuit interconnections; ESD protection design; contact scheme; electro static discharge stress; local interconnects; on-resistance; protection devices; Anodes; Cathodes; Current density; Electrostatic discharges; Logic gates; Robustness; Stress; CMOS; ESD design; VLSI; component-level ESD; interconnects; reliability;
fLanguage
English
Publisher
ieee
Conference_Titel
IC Design & Technology (ICICDT), 2015 International Conference on
Conference_Location
Leuven
Type
conf
DOI
10.1109/ICICDT.2015.7165911
Filename
7165911
Link To Document