DocumentCode
3273738
Title
Serial Low Power Bus Coding for VLSI
Author
Kuo, Chih-Hung ; Wu, Wey-Bang ; Wu, Yi-Jang ; Lin, Jia-Hung
Author_Institution
Dept. of Electr. Eng., Nat. Cheng Kung Univ., Tainan
Volume
4
fYear
2006
fDate
25-28 June 2006
Firstpage
2449
Lastpage
2453
Abstract
In this paper, we present a serial coding method to reduce the bus transition activity and implement error control code to reduce bit error probability. We propose two kinds of coding method for data bus. The basic principle is to append extra information pattern to the back of the original data packet. Experimental results show that the proposed coding scheme can reduce total bus transitions by 12% on the average, compared to that of the uncoded patterns, without adding redundant bitlines on the bus
Keywords
VLSI; error correction codes; low-power electronics; VLSI; data bus; error control code; information pattern; serial bus coding method; very large scale integration; Clocks; Energy consumption; Error correction; Error probability; Personal digital assistants; Power system reliability; Tail; Terminology; Very large scale integration; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Communications, Circuits and Systems Proceedings, 2006 International Conference on
Conference_Location
Guilin
Print_ISBN
0-7803-9584-0
Electronic_ISBN
0-7803-9585-9
Type
conf
DOI
10.1109/ICCCAS.2006.285171
Filename
4064418
Link To Document