DocumentCode :
3273762
Title :
Study of threshold voltage modeling for small-scaled strained Si nMOSFET
Author :
Jiang-Tao, Qu ; He-Ming, Zhang ; Shan-Shan, Qin ; Xiao-Bo, Xu ; Hui-Yong, Hu
Author_Institution :
Key Lab. of Wide Band-Gap Semicond. Mater. & Devices, Xidian Univ., Xi´´an, China
fYear :
2011
fDate :
15-17 April 2011
Firstpage :
4507
Lastpage :
4510
Abstract :
In this paper, based on the distribution of electric field in the channel which follows the Guass Law, an analytical expression of Quasi-2D threshold voltage model for strained Si nMOSFET with Polycrystalline SiGe gate was established. With this model, the variation threshold voltage with its design physical and geometric parameters can be predicted, such as Ge content, oxide thickness, doping concentration, gate length, and drain bias. The validity of the model was proved by ISE TCAD simulation. This model is significant for the design of high performance strained Si nMOSFET.
Keywords :
Ge-Si alloys; MOSFET; elemental semiconductors; silicon; technology CAD (electronics); Si; small-scaled strained nMOSFET; threshold voltage modeling; variation threshold voltage; Logic gates; MOS devices; MOSFET circuits; Silicon; Silicon germanium; Threshold voltage; Gauss Law; electric filed distribution; polycrystalline SiGe gate; threshold voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electric Information and Control Engineering (ICEICE), 2011 International Conference on
Conference_Location :
Wuhan
Print_ISBN :
978-1-4244-8036-4
Type :
conf
DOI :
10.1109/ICEICE.2011.5777280
Filename :
5777280
Link To Document :
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