In depth analysis of channel length, fin width (down to 10 nm) impacts on Fowler-Nordheim program/erase characteristics of Si-NC SOI FinFlash memories

Tri-gate FinFlash devices are one of the most promising solutions to solve scaling problems of Flash memories. The use of Silicon Nanocrystal storage nodes in novel 3D FinFET architecture offers the possibility of scaled gate dielectrics (implying scaled operating voltages), along with short channel effect immunity and higher sensing current drivability. In this paper, we investigate the channel length and fin width impacts (with dimensions down to 30 nm and 10 nm, respectively) on Si-NC SOI FinFlash operating in the NAND scheme. Devices with narrow fin widths show a Fowler-Nordheim (FN) write boost, while the channel length scaling strongly reduces the programming window. The obtained results are deeply explained through fully three dimensional TCAD simulations.