DocumentCode
3274547
Title
An analytical model for thermal stress analysis of multi-layered microelectronics packaging
Author
Wen, Yujun ; Basaran, Cemal
Author_Institution
Electron. Packaging Lab., State Univ. of New York, Buffalo, NY, USA
Volume
2
fYear
2004
fDate
1-4 June 2004
Firstpage
1592
Abstract
Compared to numerical methods, analytical solutions can offer a faster and more accurate procedure for obtaining the interfacial stresses in laminated structures. An analytical model for thermal stress analysis of multi-layered thin stacks on a thick substrate under isothermal loading is proposed in this paper. This analytical approach considers each layer as a beam-type plate with orthotropic material properties. Highly sensitive Moire interferometry is used to validate the model. The strain field in the bi-material interfaces is obtained experimentally. The test data is in good agreement with the proposed analytical solution. Finite element analysis results are also compared with the analytical solution and the test data.
Keywords
laminates; mathematical analysis; stress analysis; thermal management (packaging); thermal stresses; analytical model; beam-type plate; constitutive equations; finite element analysis; interfacial compliances; interfacial stresses; isothermal loading; laminated structures; moire interferometry; multilayered microelectronics packaging; orthotropic material properties; peeling stresses; thermal stress analysis; thick substrate; thin stacks; Analytical models; Capacitive sensors; Interferometry; Isothermal processes; Material properties; Microelectronics; Packaging; Testing; Thermal loading; Thermal stresses;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronic Components and Technology Conference, 2004. Proceedings. 54th
Print_ISBN
0-7803-8365-6
Type
conf
DOI
10.1109/ECTC.2004.1320328
Filename
1320328
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