DocumentCode
3274969
Title
VEDA: Variation-aware energy-efficient Discrete Wavelet Transform architecture
Author
Gupta, Vaibhav ; Karakonstantis, Georgios ; Mohapatra, Debabrata ; Roy, Kaushik
Author_Institution
Sch. of Electr. & Comput. Eng., Purdue Univ., West Lafayette, IN, USA
fYear
2010
fDate
3-6 Oct. 2010
Firstpage
260
Lastpage
265
Abstract
In this paper, we present a unified approach to an energy-efficient variation-tolerant design of Discrete Wavelet Transform (DWT) in the context of image processing applications. It is to be noted that it is not necessary to produce exactly correct numerical outputs in most image processing applications. We exploit this important feature and propose a design methodology for DWT which shows energy quality tradeoffs at each level of design hierarchy starting from the algorithm level down to the architecture and circuit levels by taking advantage of the limited perceptual ability of the Human Visual System. A unique feature of this design methodology is that it guarantees robustness under process variability and facilitates aggressive voltage over-scaling. Simulation results show significant energy savings (74%-83%) with minor degradations in output image quality and avert catastrophic failures under process variations compared to a conventional design.
Keywords
discrete wavelet transforms; image processing; discrete wavelet transform architecture; energy quality tradeoffs; energy-efficient variation-tolerant design; human visual system; image processing application; voltage over-scaling; Adders; Algorithm design and analysis; Computer architecture; Discrete wavelet transforms; Image quality; Image reconstruction; PSNR;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Design (ICCD), 2010 IEEE International Conference on
Conference_Location
Amsterdam
ISSN
1063-6404
Print_ISBN
978-1-4244-8936-7
Type
conf
DOI
10.1109/ICCD.2010.5647753
Filename
5647753
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