• DocumentCode
    3275788
  • Title

    Adaptive TDMA bus allocation and elastic scheduling: A unified approach for enhancing robustness in multi-core RT systems

  • Author

    Burgio, Paolo ; Ruggiero, Martino ; Esposito, Francesco ; Marinoni, Mauro ; Buttazzo, Giorgio ; Benini, Luca

  • Author_Institution
    DEIS, Univ. of Bologna, Bologna, Italy
  • fYear
    2010
  • fDate
    3-6 Oct. 2010
  • Firstpage
    187
  • Lastpage
    194
  • Abstract
    Next-generation real-time systems will be increasingly based on heterogeneous MPSoC design paradigms, where predictability and performance will be key issues to deal with. Such issues can be tackled both at the hardware level, by embedding technologies such as TDMA busses, and at the OS level, where suitable scheduling techniques can improve performance and reduce energy consumption. Among these, elastic scheduling has been proved to provide satisfactory results by dynamically reducing task periods at run-time to ensure the highest utilization possible of the processors. On the other hand, elastic scheduling lowers the degree of predictability and increases the complexity of the analysis at the system level. This reduces the benefits given by the TDMA bus, which relies on the high level task analysis for a robust and efficient slot allocation. Starting from this consideration, we propose a system where the elastic scheduling and the TDMA bus work synergistically. We introduce a QoS-aware adaptive bus service which takes the best of both techniques, mitigating their drawbacks at the same time. We show how the overhead introduced by coordination action is small, and it is however dominated by the benefits of the overall strategy in terms of performance and predictability guarantees.
  • Keywords
    multiprocessing systems; quality of service; real-time systems; scheduling; system-on-chip; time division multiple access; QoS-aware adaptive bus service; adaptive TDMA bus allocation; elastic scheduling; heterogeneous MPSoC design paradigms; high level task analysis; multicore RT systems; next-generation real-time systems; slot allocation; Bandwidth; Computer architecture; Hardware; Heuristic algorithms; Real time systems; Time division multiple access; Wheels;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer Design (ICCD), 2010 IEEE International Conference on
  • Conference_Location
    Amsterdam
  • ISSN
    1063-6404
  • Print_ISBN
    978-1-4244-8936-7
  • Type

    conf

  • DOI
    10.1109/ICCD.2010.5647792
  • Filename
    5647792