DocumentCode
3276294
Title
Routing using implicit connection graphs [VLSI design]
Author
Zheng, S.Q. ; Lim, J.S. ; Iyengar, S.S.
Author_Institution
Dept. of Comput. Sci., Louisiana State Univ., Baton Rouge, LA, USA
fYear
1996
fDate
3-6 Jan 1996
Firstpage
49
Lastpage
52
Abstract
We introduce a framework for a class of algorithms solving shortest path related problems, such as the one-to-one shortest path problem, the one-to-many shortest paths problem and the minimum spanning tree problem, in the presence of obstacles. For these algorithms, the search space is restricted to a sparse strong connection graph which is implicitly represented and its searched portion is constructed incrementally on-the-fly during search. The time and space requirements of these algorithms essentially depend on actual search behavior. These algorithms are suitable for large VLSI design applications with many obstacles
Keywords
VLSI; circuit layout CAD; graph theory; integrated circuit layout; search problems; VLSI layout; implicit connection graphs; large VLSI design applications; minimum spanning tree problem; obstacles; search behavior; shortest path related problems; sparse strong connection graph; Algorithm design and analysis; Circuits; Computer science; Information systems; Orbital robotics; Routing; Shortest path problem; Target tracking; Tree graphs; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Design, 1996. Proceedings., Ninth International Conference on
Conference_Location
Bangalore
ISSN
1063-9667
Print_ISBN
0-8186-7228-5
Type
conf
DOI
10.1109/ICVD.1996.489453
Filename
489453
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