Title :
High-performance architecture of H.264 integer-pixel motion estimation IP for real-time 1080HD video CODEC
Author :
Chang, Hoyoung ; Kim, Soojin ; Lee, Seonyoung ; Cho, Kyeongsoon
Author_Institution :
Dept. of Electron. & Inf. Eng., Hankuk Univ. of Foreign Studies, Yongin, South Korea
Abstract :
We propose a new H.264 integer-pixel motion estimation algorithm and circuit architecture to improve the processing speed. The proposed circuit supports 7 kinds of variable block sizes and generates 41 motion vectors. The implemented IP based on the proposed algorithm and architecture processes 60 image frames per second for 1080HD video at the operating frequency of 45.5 MHz.
Keywords :
data compression; logic design; motion estimation; video codecs; video coding; H.264 integer-pixel motion estimation IP; circuit architecture; frequency 45.5 MHz; high-performance architecture; motion vectors; processing speed; real-time 1080HD video codec; variable block sizes; Motion estimation; Video codecs;
Conference_Titel :
SOC Conference, 2009. SOCC 2009. IEEE International
Conference_Location :
Belfast
Print_ISBN :
978-1-4244-4940-8
Electronic_ISBN :
978-1-4244-4941-5
DOI :
10.1109/SOCCON.2009.5398003
