• DocumentCode
    3276519
  • Title

    Trimming of current mode DACs by adjusting Vt

  • Author

    Biman, A. ; Nairn, D.G.

  • Author_Institution
    Dept. Electr. & Comput. Eng., Queen´´s Univ., Kingston, Ont., Canada
  • Volume
    1
  • fYear
    1996
  • fDate
    12-15 May 1996
  • Firstpage
    33
  • Abstract
    R-2R current mode DACs are useful in many mixed digital/analog applications. Unfortunately, the accuracy of these DACs is limited by device matching. To correct the mismatch, a trimming technique based on trimming the threshold voltage by adjusting the substrate bias is proposed. The advantage of this technique is its ease of integration into almost any CMOS process. To demonstrate the trimming technique, an R-2R ladder was fabricated. The results indicate that the technique is feasible for trimming errors due to mismatch
  • Keywords
    CMOS integrated circuits; digital-analogue conversion; error correction; ladder networks; CMOS process; DAC trimming; R-2R ladder; current mode DACs; mismatch errors; substrate bias adjustment; threshold voltage trimming; Analog-digital conversion; Application software; CMOS process; Circuits; Costs; MOSFETs; Production; Resistors; Switches; Threshold voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 1996. ISCAS '96., Connecting the World., 1996 IEEE International Symposium on
  • Conference_Location
    Atlanta, GA
  • Print_ISBN
    0-7803-3073-0
  • Type

    conf

  • DOI
    10.1109/ISCAS.1996.539801
  • Filename
    539801
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3276519