Design of multistage evolution of different-structure redundant digital system based on graph theory

Author

Jiang, Yuanyuan ; Wang, Youren ; Zhang, Zhai

Author_Institution

Coll. of Electr. & Inf. Eng., Anhui Univ. of Sci. & Technol., Huainan, China

fYear

2011

fDate

15-17 April 2011

Firstpage

4117

Lastpage

4120

Abstract

The paper presents an effective method for different structure digital system based on on-line evolution with fault tolerance technology. Integer-coding multistage evolution is used to design digital system and different-structure system is evaluated by using the knowledge of quad tree. Thus, the length of chromosome can be reduced and the degree of different structure system can be evaluated effectively. The on-line evolutionary design of a 4×2 multiplier was performed as an example, and the experimental results showed that, compared with the existing methods, the digital circuit was successfully on line evolved and the fault-ability of the different-structure redundant systems was raised.

Keywords

digital circuits; fault tolerance; graph theory; integer programming; redundancy; redundant number systems; different-structure redundant digital system; digital circuit; fault tolerance technology; graph theory; integer-coding multistage evolution; online evolutionary design; quad tree; Circuit faults; Digital circuits; Digital systems; Fault tolerance; Fault tolerant systems; Hardware; Integrated circuit modeling; design of Redundant System with Different Structures; digital circuit; evaluation of different-structure redundant; evolvable hardware; multistage on-line evolution; quad tree;

fLanguage

English

Publisher

ieee

Conference_Titel

Electric Information and Control Engineering (ICEICE), 2011 International Conference on

Conference_Location

Wuhan

Print_ISBN

978-1-4244-8036-4

Type

conf

DOI

10.1109/ICEICE.2011.5777429

Filename

5777429