DocumentCode :
3276808
Title :
DDR3 based lookup circuit for high-performance network processing
Author :
Yang, Xin ; Sezer, Sakir ; McCanny, John ; Burns, Dwayne
Author_Institution :
ECIT Inst., Queen´´s Univ. Belfast, Belfast, UK
fYear :
2009
fDate :
9-11 Sept. 2009
Firstpage :
351
Lastpage :
354
Abstract :
Double Data Rate (DDR) SDRAMs have been prevalent in the PC memory market in recent years and are widely used for networking systems. These memory devices are rapidly developing, with high density, high memory bandwidth and low device cost. However, because of the high-speed interface technology and complex instruction-based memory access control, a specific purpose memory controller is necessary for optimizing the memory access trade off. In this paper, a specific purpose DDR3 controller for high-performance table lookup is proposed and a corresponding lookup circuit based on the Hash-CAM approach is presented.
Keywords :
DRAM chips; content-addressable storage; integrated circuit design; memory architecture; storage management; table lookup; DDR3 based lookup circuit; Double Data Rate SDRAM; Hash-CAM approach; PC memory; complex instruction-based memory access control; device cost; high-performance network processing; high-speed interface technology; memory access optimization; memory bandwidth; memory device; specific purpose memory controller; table lookup; Bandwidth; CADCAM; Circuits; Computer aided manufacturing; Costs; Memory architecture; Memory management; Random access memory; SDRAM; Table lookup;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
SOC Conference, 2009. SOCC 2009. IEEE International
Conference_Location :
Belfast
Print_ISBN :
978-1-4244-4940-8
Electronic_ISBN :
978-1-4244-4941-5
Type :
conf
DOI :
10.1109/SOCCON.2009.5398024
Filename :
5398024
Link To Document :
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