Title :
Automatic debugging of System-on-a-Chip designs
Author :
Rogin, Frank ; Drechsler, Rolf ; Rülke, Steffen
Author_Institution :
Div. Design Autom., Fraunhofer Inst. for Integrated Circuits, Dresden, Germany
Abstract :
Designing system-on-a-chip (SoC) using system-level languages is becoming a standard in industry. However, the non-deterministic semantics of such parallel languages could yield failures that are hard to debug. In this paper, we present a new approach that supports automatic debugging of SoC designs written in SystemC using a method that isolates failure-inducing process schedules.
Keywords :
program debugging; system-on-chip; SystemC; automatic SoC design debugging; failure-inducing process schedules; parallel languages; system-level languages; system-on-a-chip design; Automatic testing; Debugging; Design automation; Instruments; Job shop scheduling; Scheduling algorithm; System analysis and design; System recovery; System testing; System-on-a-chip;
Conference_Titel :
SOC Conference, 2009. SOCC 2009. IEEE International
Conference_Location :
Belfast
Print_ISBN :
978-1-4244-4940-8
Electronic_ISBN :
978-1-4244-4941-5
DOI :
10.1109/SOCCON.2009.5398027
