Title :
Switching cell design with EMC and commutation losses criteria
Author :
Akhbari, M. ; Schanen, J.L. ; Perret, R.
Author_Institution :
Lab. d´´Electrotech., CNRS, Grenoble, France
Abstract :
This paper presents a MOSFET-diode switching cell model which is both accurate and fast allowing the designer to determine the optimum gate resistance in order to comply with both switching losses and EMC constraints. All technological parameters which are important in EMC studies such as parasitic inductance of layout and capacitive behaviour of semiconductor devices are taken into account. The model is implemented in MATLAB(R) that allows optimisation of the layout structure and derivation of parameters. As an application, the model is used in design procedure of a buck converter
Keywords :
DC-DC power convertors; capacitance; commutation; electromagnetic compatibility; field effect transistor switches; inductance; losses; power MOSFET; power semiconductor diodes; switching circuits; EMC; EMC constraints; MATLAB; MOSFET-diode switching cell model; buck converter; capacitive behaviour; commutation losses criteria; layout structure optimisation; optimum gate resistance; parasitic inductance; semiconductor devices; switching cell design; switching losses; Computer languages; Electromagnetic compatibility; Energy loss; Inductance; MOSFET circuits; Mathematical model; Power semiconductor switches; Semiconductor devices; Semiconductor diodes; Switching loss;
Conference_Titel :
Industry Applications Conference, 1999. Thirty-Fourth IAS Annual Meeting. Conference Record of the 1999 IEEE
Conference_Location :
Phoenix, AZ
Print_ISBN :
0-7803-5589-X
DOI :
10.1109/IAS.1999.801688
