DocumentCode :
3277381
Title :
Support vector machine FPGA implementation for video shot boundary detection application
Author :
Hsu, Chun F. ; Ku, Mong-Kai ; Liu, Li-Yen
Author_Institution :
Dept. of CSIE, Nat. Taiwan Univ., Taipei, Taiwan
fYear :
2009
fDate :
9-11 Sept. 2009
Firstpage :
239
Lastpage :
242
Abstract :
This paper presents a video shot boundary detection system based on support vector machine (SVM) classification method. A hardware fully-parallel digital support vector machine (SVM) classifier is used to detect the shot boundary in a continuous video stream. The throughput is increased by employing a pipelined architecture in the feature extraction stage. Hardware SVM can detect both cut and gradual transition in the video stream. Random pseudo-sampling techniques are employed to solve the class imbalance problem in SVM training. The internal wordlength is optimized for performance and hardware complexity. The threshold method in the postprocessing stage merges small subshots to reduce false alarms. The complete system is demonstrated on Xilinx Virtex IV XC4VSX35 FPGA platform to achieve 256 frames per second.
Keywords :
feature extraction; field programmable gate arrays; pattern classification; signal sampling; support vector machines; video signal processing; video streaming; FPGA; Virtex IV; Xilinx; classifier; feature extraction; hardware complexity; pipelined architecture; random pseudo-sampling; support vector machine; video shot boundary detection; video stream; Feature extraction; Field programmable gate arrays; Gunshot detection systems; HDTV; Hardware; Histograms; Kernel; Streaming media; Support vector machine classification; Support vector machines;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
SOC Conference, 2009. SOCC 2009. IEEE International
Conference_Location :
Belfast
Print_ISBN :
978-1-4244-4940-8
Electronic_ISBN :
978-1-4244-4941-5
Type :
conf
DOI :
10.1109/SOCCON.2009.5398049
Filename :
5398049
Link To Document :
بازگشت