• DocumentCode
    3277386
  • Title

    Reliability assessment of high density multi-layer board assembly using shadow Moire and luminescence spectroscopy

  • Author

    Bansal, S. ; Raj, P. Markondeya ; Shinotani, K. ; Bhattacharya, S. ; Tummala, R. ; Lance, M.J.

  • Author_Institution
    Packaging Res. Center, Georgia Inst. of Technol., Atlanta, GA, USA
  • fYear
    2002
  • fDate
    10-12 Dec. 2002
  • Firstpage
    126
  • Lastpage
    132
  • Abstract
    Novel low CTE-high stiffness organic and inorganic boards were evaluated for flip-chip on board technology without underfill. Standard liquid-liquid thermal shock tests were carried out on test vehicles with different board materials and failure modes were characterized. In-situ warpage and stress measurements were made to analyze the observed failure modes and to set guidelines for optimal board material selection. The effect of interlayer dielectric thickness on the package reliability has also been studied. The reliability test results are in accordance with the inferences from the in-situ warpage and stress measurements and it can be concluded that along with low CTE, high modulus is an inevitable substrate property requirement for flip-chip reliability without underfill in next-generation packages. This paper also presents photostimulated luminescence spectroscopy as a nondestructive and direct technique for the in-situ stress measurement in microsystems and thus a powerful means for reliability assessment.
  • Keywords
    electroluminescence; failure analysis; flip-chip devices; microassembling; moire fringes; printed circuit testing; printed circuits; reliability; spectroscopy; stress measurement; thermal stresses; SOP; failure analysis; flip-chip on board technology; high density multi-layer board; inorganic boards; interlayer dielectric thickness; liquid-liquid thermal shock tests; low CTE high stiffness boards; multi-layer board assembly; organic boards; package reliability; photostimulated luminescence spectroscopy; shadow Moire in-situ warpage measurements; stress measurements; substrate modulus; system-on-a-package; Assembly; Dielectric materials; Dielectric substrates; Electric shock; Luminescence; Materials testing; Packaging; Spectroscopy; Stress measurement; Vehicles;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronics Packaging Technology Conference, 2002. 4th
  • Print_ISBN
    0-7803-7435-5
  • Type

    conf

  • DOI
    10.1109/EPTC.2002.1185610
  • Filename
    1185610