A speech recognition SoC based on ARM7-TDMI core and a MSAC co-processor

Author

Geng, Hui ; Liang, Weiqian ; Dong, Ming

Author_Institution

Inst. of Microelectron., Tsinghua Univ., Beijing, China

fYear

2009

fDate

9-11 Sept. 2009

Firstpage

235

Lastpage

238

Abstract

Most of the present high-performance speech recognition systems are based on CHMM (Continuous Hidden Markov Model) algorithm, however, for embedded systems, it involves much computational cost. This paper solves this problem by proposing a SoC composed of ARM7TDMI, and a co-processor MSAC (Multiplier Square Accumulate Calculation) used to calculate the Mahalanobis distance. Testing with 358-state 3-mixture 27-feature HMM model on Actel ProASIC series FPGA M7A3P1000, the SoC at 24 MHZ reaches 1.54 times real-time, and its power consumption is 0.56 mW/MHz.

Keywords

coprocessors; field programmable gate arrays; hidden Markov models; speech recognition; system-on-chip; ARM7-TDMI core; Actel ProASIC series; FPGA M7A3P1000; MSAC co-processor; Mahalanobis distance; continuous hidden Markov model; embedded systems; multiplier square accumulate calculation; speech recognition SoC; speech recognition systems; Application specific integrated circuits; Automatic speech recognition; Coprocessors; Costs; Embedded system; Energy consumption; Hardware; Hidden Markov models; Probability; Speech recognition;

fLanguage

English

Publisher

ieee

Conference_Titel

SOC Conference, 2009. SOCC 2009. IEEE International

Conference_Location

Belfast

Print_ISBN

978-1-4244-4940-8

Electronic_ISBN

978-1-4244-4941-5

Type

conf

DOI

10.1109/SOCCON.2009.5398052

Filename

5398052