DocumentCode
3277705
Title
A prototype platform for system-on-chip ADC test and measurement
Author
Mullane, Brendan ; Brien, Vincent O. ; MacNamee, Ciaran ; Fleischmann, Thomas
Author_Institution
Dept. of Electron. & Comput. Eng., Univ. of Limerick, Limerick, Ireland
fYear
2009
fDate
9-11 Sept. 2009
Firstpage
169
Lastpage
172
Abstract
An optimal solution for implementing ADC built-in-self-test into a SOC design is presented. ADC linear and dynamic testing occurs in parallel which reduces test time. A signal generator produces a ramp for linear histogram measurements and a sine-wave signal for dynamic tests. This platform permits a BIST design that is predominantly a digital solution and enables accurate testing using low silicon area.
Keywords
analogue-digital conversion; built-in self test; dynamic testing; system-on-chip; ADC built-in-self-test; BIST design; SOC design; dynamic testing; linear histogram measurements; linear testing; low silicon area; signal generator; system-on-chip; Built-in self-test; Digital signal processing; Engines; Histograms; Linearity; Prototypes; Random access memory; Signal generators; System testing; System-on-a-chip;
fLanguage
English
Publisher
ieee
Conference_Titel
SOC Conference, 2009. SOCC 2009. IEEE International
Conference_Location
Belfast
Print_ISBN
978-1-4244-4940-8
Electronic_ISBN
978-1-4244-4941-5
Type
conf
DOI
10.1109/SOCCON.2009.5398065
Filename
5398065
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