DocumentCode
3277736
Title
Instruction Folding for an Asynchronous Java Co-Processor
Author
Säntti, Tero ; Plosila, Juha
Author_Institution
Turku Univ., Turku
fYear
2005
fDate
17-17 Nov. 2005
Firstpage
18
Lastpage
21
Abstract
This paper presents a novel method for instruction folding in Java execution. The approach is to use an asynchronous co-processor for execution of Java bytecode. The folding is done in the same pipeline stage with instruction decoding. The co-processor is designed using asynchronous techniques to provide low power usage with reasonable performance. The co-processor can be used in a single CPU and single co-processor environment or in a network of multiple CPUs and co-processors. The co-processor does not need to know what kind of environment it is placed in, as all communication goes through an interface unit designed especially for that environment. This modularity of the design makes the co-processor more reusable and allows system level scalability. This work is a part of a project focusing on design of an advanced Java co-processor for Java intensive SoC applications.
Keywords
Java; coprocessors; pipeline processing; system-on-chip; virtual machines; Java byte code execution; Java coprocessor design; Java intensive SoC applications; asynchronous Java coprocessor; coprocessor reusability; design modularity; instruction decoding; instruction folding; pipeline processing; system level scalability; Circuits; Clocks; Coprocessors; Energy consumption; Hardware; Information technology; Java; Laboratories; Pipelines; Virtual machining;
fLanguage
English
Publisher
ieee
Conference_Titel
System-on-Chip, 2005. Proceedings. 2005 International Symposium on
Conference_Location
Tampere
Print_ISBN
0-7803-9294-9
Type
conf
DOI
10.1109/ISSOC.2005.1595633
Filename
1595633
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