DocumentCode
3277865
Title
Proof of Concept for Low-power Digital Asynchronous IC Design
Author
Zetterman, Tommi J. ; Liimatainen, Jukka T. ; Alamaunu, Jyrki T.
Author_Institution
Comput. Archit. Lab., Helsinki
fYear
2005
fDate
17-17 Nov. 2005
Firstpage
38
Lastpage
41
Abstract
Asynchronous IC technology research has been carried out in Nokia Research Center in the project, where four different test chips were manufactured and measured. The measurement results indicate significant power savings compared to synchronous circuits. This paper presents our asynchronous design flow, test design, and the measurement result of manufactured test chip samples.
Keywords
asynchronous circuits; digital integrated circuits; integrated circuit design; integrated circuit testing; logic design; low-power electronics; Nokia Research Center; asynchronous design flow; low-power digital asynchronous IC design; manufactured test chip sample; power savings; test chips; test design; Circuit testing; Clocks; Digital integrated circuits; Flip-flops; Logic circuits; Logic design; Logic testing; Manufacturing; Power measurement; Semiconductor device measurement;
fLanguage
English
Publisher
ieee
Conference_Titel
System-on-Chip, 2005. Proceedings. 2005 International Symposium on
Conference_Location
Tampere
Print_ISBN
0-7803-9294-9
Type
conf
DOI
10.1109/ISSOC.2005.1595639
Filename
1595639
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