DocumentCode
3278100
Title
Run-time Mapping of Applications to a Heterogeneous SoC
Author
Smit, Lodewijk T. ; Hurink, Johann L. ; Smit, Gerard J M
Author_Institution
Twente Univ., Enschede
fYear
2005
fDate
17-17 Nov. 2005
Firstpage
78
Lastpage
81
Abstract
This paper presents an iterative hierarchical approach to map an application to a parallel heterogeneous SoC architecture at run-time. The application is modeled as a set of communicating processes. The optimization objective is to minimize the energy consumption of the SoC, while still providing the required quality of service. This approach is flexible, scalable and the performance looks promising.
Keywords
multiprocessing systems; parallel architectures; quality of service; system-on-chip; iterative hierarchical approach; parallel heterogeneous SoC architecture; quality of service; run-time application mapping; Delay; Digital signal processing; Energy consumption; Field programmable gate arrays; Libraries; Network-on-a-chip; Quality of service; Runtime; Tiles; Timing;
fLanguage
English
Publisher
ieee
Conference_Titel
System-on-Chip, 2005. Proceedings. 2005 International Symposium on
Conference_Location
Tampere
Print_ISBN
0-7803-9294-9
Type
conf
DOI
10.1109/ISSOC.2005.1595649
Filename
1595649
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