• DocumentCode
    3278214
  • Title

    Low-distortion double-sampling ΔΣ ADC using a direct-charge-transfer adder

  • Author

    Wang, Yan ; Temes, Gabor C.

  • Author_Institution
    Sch. of Electr. Eng. & Comput. Sci., Oregon State Univ., Corvallis, OR, USA
  • fYear
    2009
  • fDate
    9-11 Sept. 2009
  • Firstpage
    71
  • Lastpage
    74
  • Abstract
    A new double-sampling architecture is proposed for wideband low-power ΔΣ ADC design. A direct-charge-transfer adder is used to reduce the bandwidth requirements for the adder, and the loop filter´s linearity requirement is relaxed by using a low-distortion topology. To verify the proposed design methodology, a 2nd order double-sampling delta-sigma ADC using the proposed scheme has been designed and simulated.
  • Keywords
    adders; analogue-digital conversion; delta-sigma modulation; network synthesis; delta-sigma ADC; delta-sigma analog-to-digital converters; direct-charge-transfer adder; low-distortion double-sampling ΔΣ ADC; low-distortion topology;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    SOC Conference, 2009. SOCC 2009. IEEE International
  • Conference_Location
    Belfast
  • Print_ISBN
    978-1-4244-4940-8
  • Electronic_ISBN
    978-1-4244-4941-5
  • Type

    conf

  • DOI
    10.1109/SOCCON.2009.5398091
  • Filename
    5398091
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3278214