Low-distortion double-sampling ΔΣ ADC using a direct-charge-transfer adder

A new double-sampling architecture is proposed for wideband low-power ΔΣ ADC design. A direct-charge-transfer adder is used to reduce the bandwidth requirements for the adder, and the loop filter´s linearity requirement is relaxed by using a low-distortion topology. To verify the proposed design methodology, a 2^nd order double-sampling delta-sigma ADC using the proposed scheme has been designed and simulated.