Title :
Design of a 1.8V 8-bit 1GSPS cascaded-folding CMOS A/D converter based on a folder averaging technique
Author :
Lee, Dongheon ; Kim, Seunghun ; Hwang, Jooho ; Moon, Junho ; Song, Minkyu
Author_Institution :
Dept. of Semicond. Sci., Dongguk Univ., Seoul, South Korea
Abstract :
In this paper, a CMOS analog-to-digital converter (ADC) with an 8-bit 1GSPS at 1.8V is designed. The architecture of the proposed ADC is based on a folding ADC with a cascaded-folding and an interpolation structure. A self-linearized preamplifier with source degeneration technique and a folder averaging technique for the high-performance are introduced. Further, a novel auto-switching encoder is also proposed. The chip has been fabricated with 0.18¿m 1-poly 5-metal CMOS technology. The active chip area is 0.72mm2 and it consumes about 200mW at 1.8V power supply.
Keywords :
CMOS integrated circuits; analogue-digital conversion; preamplifiers; 1-poly 5-metal CMOS technology; CMOS A/D converter; analog-to-digital converter; auto-switching encoder; cascaded folding; folder averaging; interpolation structure; self-linearized preamplifier; size 0.18 mum; source degeneration; voltage 1.8 V; word length 8 bit; Analog-digital conversion; CMOS technology; Circuits; Interpolation; Linearity; Moon; Power supplies; Preamplifiers; Resistors; Voltage;
Conference_Titel :
SOC Conference, 2009. SOCC 2009. IEEE International
Conference_Location :
Belfast
Print_ISBN :
978-1-4244-4940-8
Electronic_ISBN :
978-1-4244-4941-5
DOI :
10.1109/SOCCON.2009.5398092
