DocumentCode
32793
Title
A Multiobjective Optimization Based Fast and Robust Design Methodology for Low Power and Low Phase Noise Current Starved VCO
Author
Rout, Prakash Kumar ; Acharya, Debiprasad Priyabrata ; Panda, Ganapati
Author_Institution
Silicon Inst. of Technol., Bhubaneswar, India
Volume
27
Issue
1
fYear
2014
fDate
Feb. 2014
Firstpage
43
Lastpage
50
Abstract
This paper presents a novel design methodology for design of optimal and robust current starved voltage controlled oscillator (CSVCO) circuit. A recently developed multiobjective optimization technique infeasibility driven evolutionary algorithm is used to minimize the power and the phase noise of the circuit at its schematic and physical level. The multiobjective optimization is carried out by taking into account the extracted parasitics that would be present in the physical integrated circuit and the random variations of parameters during fabrication in foundry. This method helps the designer in semiconductor industry by effectively reducing several time consuming design iterations to a single iteration ensuring the near optimal performance of the CSVCO. The performance of the circuit is validated by carrying out simulations for transient and noise analysis in Cadence tools using 90 nm 1P9M CMOS process.
Keywords
CMOS integrated circuits; evolutionary computation; integrated circuit design; low-power electronics; phase noise; voltage-controlled oscillators; CSVCO circuit; Cadence tools; current starved voltage controlled oscillator circuit; extracted parasitics; foundry; infeasibility driven evolutionary algorithm; multiobjective optimization technique; noise analysis; phase noise; physical integrated circuit; random variations; semiconductor industry designer; size 90 nm; time consuming design iterations; transient analysis; Integrated circuit modeling; Layout; Optimization; Phase noise; Robustness; Voltage-controlled oscillators; Current Starved Voltage Controlled Oscillator (CSVCO); Industrial Design Optimization; Infeasibility Driven Evolutionary Algorithm (IDEA); Multi-objective optimization;
fLanguage
English
Journal_Title
Semiconductor Manufacturing, IEEE Transactions on
Publisher
ieee
ISSN
0894-6507
Type
jour
DOI
10.1109/TSM.2013.2295423
Filename
6689326
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