• DocumentCode
    3280428
  • Title

    Electrical characterization of multi-layer BGA packages for high speed, high switching activity applications

  • Author

    Wai-Yeung Yip ; Jyh-Ming Jong ; Tripathi, V.K.

  • Author_Institution
    Package Characterization & Simulation Group, LSI Logic Corp., Fremont, CA
  • fYear
    1996
  • fDate
    28-30 Oct 1996
  • Firstpage
    114
  • Lastpage
    116
  • Abstract
    With ever-increasing requirement for package performance, multi-layer BGA packages are gradually moving into mainstream. This trend represents a major challenge in package characterization because of the difficulty in modeling the complex interaction between signal traces and power/ground planes in a multi-layer package. An accurate package model encompassing both signal and power/ground is especially critical for performance evaluation in applications where a large number (hundreds) of output drivers switch simultaneously at high speed (over 200 MHz clock speed). There thus exists a need for a novel approach to create models for multi-layer packages with acceptable accuracies to predict their performance in high end applications, and yet with reasonable complexities not to overwhelm the model parameter extraction and subsequently the simulation software. This paper presents results of simulations to evaluate performance of a multi-layer BGA package in a high speed, high switching activity application. Different modeling methodologies and model circuit topologies are employed to generate models with different complexities and accuracies. The major difference between these models would be in the amount of embedded inductive coupling information. These models are then used in system simulations to generate different performance parameters for comparison of accuracy. The die power/ground bus model and the package model are altered to evaluate different schemes to enhance system performance
  • Keywords
    digital integrated circuits; integrated circuit modelling; integrated circuit packaging; simulation; die power/ground bus model; electrical characterization; embedded inductive coupling; high speed applications; high switching activity applications; model circuit topologies; model parameter extraction; modeling methodologies; multilayer BGA packages; package model; performance evaluation; power/ground planes; system simulations;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electrical Performance of Electronic Packaging, 1996., IEEE 5th Topical Meeting
  • Conference_Location
    Napa, CA
  • Print_ISBN
    0-7803-3514-7
  • Type

    conf

  • DOI
    10.1109/EPEP.1996.564801
  • Filename
    564801