2.5-GHz hybrid oscillator with both a wide tuning range and high frequency resolution for digital PLL

A hybrid oscillator for WiMAX application is presented with comprehensive study. The hybrid oscillator is part of a digital fractional-N frequency synthesizer realized in a 0.13 μm CMOS process. By operating the DAC followed by oscillator, the requirement of finest switched capacitor value and high-speed dithering of Δ Σ data converter are relaxed. A time domain simulation approach for modeling the phase noise introduced by the frequency discretization was taken. The proposed approach is well suited to investigate complex interactions in the sophisticated system, which cannot be studied by using conventional RF and analog simulation tools. The prototype core chip consumes 8.6 raA from a 1.4-V supply while providing a phase noise of -120.35 dBc/Hz at 1 MHz offset from 2.808 GHz carrier and a 570 MHz frequency tuning range (23%).