DocumentCode
3280655
Title
ESD protection design for broadband RF circuits with decreasing-size distributed protection scheme
Author
Ker, Ming-Dou ; Kuo, Bing-Jye
Author_Institution
Nanoelectronics & Gigascale Syst. Lab., Nat. Chiao Tung Univ., Hsinchu, Taiwan
fYear
2004
fDate
6-8 June 2004
Firstpage
383
Lastpage
386
Abstract
The resulting capacitive load, from a large electrostatic discharge (ESD) protection device for high ESD robustness, has an adverse effect on the performance of broadband RF circuits due to the impedance mismatch and bandwidth degradation. The conventional distributed ESD protection scheme, using equal four-stage ESD protection can achieve a better impedance match, but degrades the ESD performance. A new distributed ESD protection structure is proposed in this work, to achieve both good ESD robustness and RF performance. The proposed ESD protection circuit is constructed by arranging ESD protection stages with decreasing device size, named decreasing-size distributed ESD (DS-DESD) protection scheme, which is beneficial to the ESD level. The experimental results have shown a human-body-model (HBM) ESD robustness of up to 8 kV.
Keywords
CMOS integrated circuits; electrostatic discharge; impedance matching; radiofrequency integrated circuits; 8 kV; CMOS process; DS-DESD; ESD device capacitive load; ESD protection; HBM; bandwidth degradation; broadband RF circuits; decreasing-size distributed ESD protection; electrostatic discharge; human-body-model ESD robustness; impedance match; impedance mismatch; CMOS technology; Circuits; Degradation; Electrostatic discharge; Impedance; Pins; Protection; Radio frequency; Robustness; Signal design;
fLanguage
English
Publisher
ieee
Conference_Titel
Radio Frequency Integrated Circuits (RFIC) Symposium, 2004. Digest of Papers. 2004 IEEE
ISSN
1529-2517
Print_ISBN
0-7803-8333-8
Type
conf
DOI
10.1109/RFIC.2004.1320629
Filename
1320629
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