• DocumentCode
    3280951
  • Title

    Interconnection requirements and multi-die integration for FPGAs

  • Author

    Rahman, Aminur ; Schulz, J. ; Grenier, R. ; Chanda, Kaushik ; Lee, M.J. ; Ratakonda, D. ; Shi, Hongyu ; Li, Zuyi ; Chandrasekar, Karthik ; Xie, Junfeng ; Ibbotson, D.

  • Author_Institution
    Altera Corp., San Jose, CA, USA
  • fYear
    2013
  • fDate
    13-15 June 2013
  • Firstpage
    1
  • Lastpage
    3
  • Abstract
    Die stacking technology with high-density interconnect is enabling new product architectures and capabilities. Silicon interposer based stacking with through silicon via (TSV) has gained traction for high-performance applications. Some of the challenges in manufacturing technology, supply-chain strategy, design tools and infrastructure are being addressed to enable broader technology adoption. This paper provides an overview of Field Programmable Gate Array (FPGA) application trends which are driving the need for advanced die-stacking technologies. We present design and manufacturing considerations for stacking technologies and highlight lessons learned from a recent technology demonstration vehicle.
  • Keywords
    field programmable gate arrays; integrated circuit interconnections; three-dimensional integrated circuits; FPGA; die stacking technology; field programmable gate array application; high density interconnect; interconnection requirements; multidie integration; silicon interposer based stacking; through silicon via; Bandwidth; Field programmable gate arrays; Manufacturing; Silicon; Three-dimensional displays; Through-silicon vias; Vehicles;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Interconnect Technology Conference (IITC), 2013 IEEE International
  • Conference_Location
    Kyoto
  • Print_ISBN
    978-1-4799-0438-9
  • Type

    conf

  • DOI
    10.1109/IITC.2013.6615596
  • Filename
    6615596