• DocumentCode
    3281016
  • Title

    IEEE 1164 enhancements needed for Ips and SoC

  • Author

    Ecker, Wolfgang ; Bailey, Susan

  • Author_Institution
    Infineon Technologies
  • fYear
    1999
  • fDate
    4-6 Oct. 1999
  • Firstpage
    70
  • Lastpage
    70
  • Abstract
    No doubt, core based design, also known as IP-based design, is seen as the most promising strategy for increasing design productivity and thus closing the design gap. Several alternatives for using IP cores are possible starting from full layout to functional descriptions, which need high-level synthesis techniques to be mapped to a net-list. This workshop will focus on the modifications needed to the IEEE Std. 1164 package for all design styles of IPs and SoC. For the purpose of this workshop, the modifications are grouped into extensions, changes, and enhancements. In addition, standardization aspects, i.e. the inclusion of IEEE 1164 directly in IEEE 1076, will be discussed.
  • Keywords
    Conferences; Hardware design languages; High level synthesis; Logic arrays; Packaging; Standardization; Switches; Writing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Fall VIUF Workshop, 1999.
  • Conference_Location
    Orlando, FL, USA
  • Print_ISBN
    0-7695-0465-5
  • Type

    conf

  • DOI
    10.1109/VIUF.1999.801980
  • Filename
    801980