DocumentCode :
3281610
Title :
Dual RAID technique for ensuring high reliability and performance in SSD
Author :
Sohyun Koo ; Se Jin Kwon ; Sungsoo Kim ; Tae-Sun Chung
Author_Institution :
Comput. Eng. Dept., Ajou Univ., Suwon, South Korea
fYear :
2015
fDate :
June 28 2015-July 1 2015
Firstpage :
399
Lastpage :
404
Abstract :
The use of MLC/TLC (Multiple/Triple Level Cell) flash memory increases bit error rate, and declines its reliability. To remedy this loss, the Redundancy Array of Inexpensive Disk (RAID) have been widely used to enhance the reliability of the Hard Disk Drive (HDD) and the Solid State Drive (SSD). RAID 5 and RAID 6 ensure high reliability among the various RAID techniques. These RAID techniques exploit parity to recover failures, it is updated whenever data renewed. The RAID 5 technique contains separated parity in a page of different stripes. In the RAID 6 technique, however, parity is written to double. So, RAID 6 guarantees more reliability. These RAID techniques enhance reliability, stability and data recovery capability in SSD. In this paper, we propose the dual RAID technique to use both RAID 5 and RAID 6 in a particular way depending on the data reliability. Reliability of data is divided to relatively high and low, these allows to be determined by user. At this time, data which requires high reliability is managed by the RAID 6 technique, and data which requires low reliability is managed by the RAID 5 technique. The purpose of this technique is to improve data recovery capability and I/O performance in SSD. This technique is evaluated by the trace-driven simulator with Financial1, Financial2, Exchange, and MSN traces. We confirm that the dual RAID technique improves I/O performance with ensuring high reliability.
Keywords :
RAID; disc drives; reliability; Exchange; Financial1; Financial2; I/O performance; MSN; RAID 5; RAID 6; SSD; data recovery capability; data reliability; dual RAID technique; redundancy array of inexpensive disk; solid state drive; trace-driven simulator; Bit error rate; Computer architecture; Error correction codes; Flash memories; Random access memory; Reliability; Time factors; RAID; SSD; dependability; flash memory; reliability;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer and Information Science (ICIS), 2015 IEEE/ACIS 14th International Conference on
Conference_Location :
Las Vegas, NV
Type :
conf
DOI :
10.1109/ICIS.2015.7166627
Filename :
7166627
Link To Document :
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