DocumentCode
3282068
Title
The analysis for system-on chip application on Full Authority Digital Engine Control system
Author
Zhu, Minling ; Wang, Xi ; Xu, Min
Author_Institution
Sch. of Jet Propulsion, Beihang Univ., Beijing, China
fYear
2011
fDate
15-17 April 2011
Firstpage
2728
Lastpage
2732
Abstract
This paper aims at understanding and analyzing the effects of system-on chip technology on FADEC (Full Authority Digital Engine Control) system. Now FADEC system involves three problems besides basic performances: life-cycle cost reduction, weight reduction and flexibility of system realization. The life-cycle cost is stemmed mainly from avionics obsolescence, system maintenance, advancing performances and system structure. With respect to weight reduction, we take FADEC system structure and realization of every element into account. The flexibility idea comes from OSA (Open System Architecture) and modularization. In view of these three problems, we introduce system-on chip technology and present its advantages. On the other hand, we utilize FPGA (Field Programmable Gate Array), one of media of system-on chip technology realization, to show its challenges. Finally, we have a conclusion that system-on chip can undertake the tasks of FADEC system despite some challenges.
Keywords
aerospace engines; avionics; field programmable gate arrays; system-on-chip; FADEC system; digital engine control system; field programmable gate array; full authority digital engine control; life-cycle cost reduction; open system architecture; system-on-chip; weight reduction; Distributed control; Electronic components; Engines; Field programmable gate arrays; IP networks; System-on-a-chip; FADEC; FPGA; flexibility; life-cycle cost; system-on chip; weight reduction;
fLanguage
English
Publisher
ieee
Conference_Titel
Electric Information and Control Engineering (ICEICE), 2011 International Conference on
Conference_Location
Wuhan
Print_ISBN
978-1-4244-8036-4
Type
conf
DOI
10.1109/ICEICE.2011.5777699
Filename
5777699
Link To Document