DocumentCode
3282113
Title
Design of the modified energy recovery logic circuit
Author
Shi, Jianying ; Baozeng Quo ; Zhao, Rui
Author_Institution
Coll. of Electron. & Informational Eng., Hebei Univ., Baoding, China
fYear
2011
fDate
15-17 April 2011
Firstpage
320
Lastpage
323
Abstract
The power consumption of the ECRL is analyzed in this paper. To overcome the shortcomings of the ECRL circuit, the modified energy recovery logic (MERL) is proposed. By increasing the additional energy recovery path, the MERL structure can completely recovered the energy on the output nodes. The characteristics of the MERL are simulated using 0.5um BSIM3V3 spice models in HSPICE. The simulation results show that the MERL circuit has much lower power consumption compared with the traditional CMOS logic. The energy can be completely recovered in the recovery phase in the MERL inventor, and the power dissipation of MERL will be lower than the ECRL when load capacitance is increased.
Keywords
SPICE; logic circuits; BSIM3V3 SPICE models; HSPICE; load capacitance; modified energy recovery logic circuit; power consumption; size 0.5 mum; CMOS integrated circuits; Capacitance; Clocks; Power demand; Power dissipation; Resistance; Simulation; ECRL; low power consumption; modifigied energy recovery logic(MERL);
fLanguage
English
Publisher
ieee
Conference_Titel
Electric Information and Control Engineering (ICEICE), 2011 International Conference on
Conference_Location
Wuhan
Print_ISBN
978-1-4244-8036-4
Type
conf
DOI
10.1109/ICEICE.2011.5777701
Filename
5777701
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