DocumentCode
3282476
Title
Layout and Geometry Tolerances in COSMOS
Author
Al-Ahmadi, Ahmad ; Kaya, Savas
fYear
2005
fDate
Dec. 7-9, 2005
Firstpage
15
Lastpage
16
Keywords
Charge carrier processes; Circuit simulation; Delay; Design engineering; Geometry; Germanium silicon alloys; MOSFET circuits; Redundancy; Silicon germanium; Tunneling;
fLanguage
English
Publisher
ieee
Conference_Titel
Semiconductor Device Research Symposium, 2005 International
Print_ISBN
1-4244-0083-X
Type
conf
DOI
10.1109/ISDRS.2005.1595953
Filename
1595953
Link To Document